8-bit Microprocessor Verilog Code -

reg_file reg_inst (.clk(clk), .rst(rst), .reg_sel_a(reg_sel_a), .reg_sel_b(reg_sel_b), .reg_sel_wr(reg_sel_wr), .wr_data(wr_data), .wr_en(wr_en), .reg_a_out(reg_a), .reg_b_out(reg_b));

Have you built your own CPU in Verilog? Share your experience or questions in the comments! 8-bit microprocessor verilog code

// Instantiate modules alu alu_inst (.a(reg_a), .b(reg_b), .op(alu_op), .result(alu_result), .zero(alu_zero)); reg_file reg_inst (

// ALU controls reg [2:0] alu_op; wire [7:0] alu_result; wire alu_zero; reg_file reg_inst (.clk(clk)